{"id":25178,"date":"2023-10-30T12:47:04","date_gmt":"2023-10-30T11:47:04","guid":{"rendered":"https:\/\/demdlx704as001.ad.harman.com\/?post_type=documentor-sections&p=25178"},"modified":"2024-06-25T15:31:03","modified_gmt":"2024-06-25T13:31:03","slug":"fira-mimo-3","status":"publish","type":"post","link":"https:\/\/audioworx.transfunnel.co\/old\/?p=25178","title":{"rendered":"FIRA MIMO"},"content":{"rendered":"

FIRA MIMO audio object is a group of FIR filter banks associated with each input and output. FIRA stands for \u201cfir accelerator\u201d and it indicates that the underlying implementation uses a hardware accelerator. MIMO stands for \u201cmulti-input multi output\u201d indicating that each output is the summation of one or more FIR filtered inputs.<\/span><\/p>\n

FIRA MIMO can be used for various applications like individual sound zones etc.<\/span><\/p>\n

Use Case:<\/strong> This audio object can be deployed whenever the audio requires the dual rate MIMO FIR filters taking into consideration the data pipeline delay and other limitations.
\nMore than one instance of FIRAMIMO also can be run in the same core .<\/em><\/span><\/p>\n

This AO supports in-place computation based on the core type.<\/span><\/p>\n

FIRA MIMO Properties<\/span><\/strong><\/p>\n

Below table describes about the FIRA<\/span>MIMO audio object properties and functionality.<\/span><\/p>\n

\"A<\/span><\/p>\n\n\n\n\n\n\n\n
Properties<\/strong><\/span><\/td>\nDescription<\/strong><\/span><\/td>\n<\/tr>\n
# of Audio In<\/strong><\/span><\/td>\nEnter the input value.<\/span><\/p>\n
    \n
  • Range: 1 to 20<\/span><\/li>\n
  • The default value is set to 4.<\/span><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n
# of Audio Out<\/strong><\/span><\/td>\nEnter the output value.<\/span><\/p>\n
    \n
  • Range: 1 to 64<\/span><\/li>\n
  • The default value is set to 4.<\/span><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n
Number of taps for Hi filters<\/strong><\/span><\/td>\nThe number of filter coefficients (taps) for the high-rate path is configured using the m_NumElements<\/em>. All channels in the high-rate path use the same number of taps.<\/span><\/p>\n
    \n
  • Range: 384 to 4096<\/span><\/li>\n
  • The default value is set to 384.<\/span><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n
Display Name<\/strong><\/span><\/td>\nDisplay name of the FIRAMIMO\u00a0 audio object in signal flow design. It can be changed based on the intended usage of the object.<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Mode<\/span><\/strong><\/p>\n

There are no modes available for FIRA MIMO.<\/span><\/p>\n

Additional Parameters<\/span><\/strong><\/p>\n

Below table describes the FIRA MIMO additional parameters.<\/span><\/p>\n

\"A<\/span><\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n
Parameter<\/strong><\/span><\/td>\nDescription<\/strong><\/span><\/td>\n<\/tr>\n
Max delay for high-rate filters<\/strong><\/span><\/td>\nLength of delay line for high-rate path.<\/span><\/p>\n
    \n
  • Range: 0 to 2048<\/span><\/li>\n
  • Default: 0<\/span><\/li>\n
  • Data Type: uint32_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Taps for low-rate filters<\/strong><\/span><\/td>\nNumber of taps for low-rate filters. All channels in the low-rate path use the same number of taps which can be different from high rate.<\/span><\/p>\n
    \n
  • Range: 512 to 2048<\/span><\/li>\n
  • Default: 512<\/span><\/li>\n
  • Data Type: uint32_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Coefficient format<\/strong><\/span><\/td>\nFilter coefficient data format.<\/span><\/p>\n
    \n
  • Range: 0 to 2<\/span>\n
      \n
    • 0: 32-bit floating point coefficients<\/span><\/li>\n
    • 1: IEEE 16-bit floating point coefficients<\/span><\/li>\n
    • 2: 16-bit fixed point coefficients<\/span><\/li>\n<\/ul>\n<\/li>\n
    • Default: 0<\/span><\/li>\n
    • Data Type: uint8_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Down sampling Factor<\/strong><\/span><\/td>\nDown sampling factor.<\/span><\/p>\n
    \n
  • Range: 0 to 1<\/span>\n
      \n
    • 0: Down sampling factor of 4<\/span><\/li>\n
    • 1: Down sampling factor of 16<\/span><\/li>\n<\/ul>\n<\/li>\n
    • Default: 1<\/span><\/li>\n
    • Data Type: uint8_t<\/span><\/li>\n<\/ul>\n

       <\/td>\n

\"A<\/span><\/td>\n<\/tr>\n
Conf matrix high<\/strong><\/span><\/td>\nConfiguration matrix for high-rate filters.<\/span><\/p>\n
    \n
  • Dimension 1: Input of size 20 or number of input channels in SFD whichever is less.<\/span><\/li>\n
  • Dimension 2: Output of size 64 or number of output channels in SFD whichever is less.<\/span><\/li>\n<\/ul>\n

    Value:<\/span><\/p>\n

      \n
    • Range: 0 to 1<\/span>\n
        \n
      • 0: FIR not present<\/span><\/li>\n
      • 1: FIR present<\/span><\/li>\n<\/ul>\n<\/li>\n
      • Default: 0<\/span><\/li>\n
      • Data Type: uint8_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Conf matrix low<\/strong><\/span><\/td>\nConfiguration matrix for low-rate filters.<\/span><\/p>\n
    \n
  • Dimension 1: Input of size 20 or number of input channels in SFD whichever is less.<\/span><\/li>\n
  • Dimension 2: Output of size 64 or number of output channels in SFD whichever is less.<\/span><\/li>\n<\/ul>\n

    Value:<\/span><\/p>\n

      \n
    • Range: 0 to 1<\/span>\n
        \n
      • 0: FIR not present<\/span><\/li>\n
      • 1: FIR present<\/span><\/li>\n<\/ul>\n<\/li>\n
      • Default: 0<\/span><\/li>\n
      • Data Type: uint8_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Max Processing Size<\/strong><\/span><\/td>\n\n

When 2 or more filters are enabled on an input channel, FIRAMIMO combines them and submits as one job to the accelerator. Max Processing Size is used as the max limit when combining.<\/span><\/p>\n

For example, when there are 6 filters enabled on an input channel and Max Processing Size is set to 4, FIRAMIMO submits the first job for 4 filters and second job with 2 filters.<\/span><\/p>\n

    \n
  • Range: 2 to 8<\/span><\/li>\n
  • Default: 4<\/span><\/li>\n
  • Data Type: uint8_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Enable Cycles Measurement<\/strong><\/span><\/td>\nEnable\/Disable realtime accelerator mcps (million cycles per second). When enabled, Average and Max mcps are available to be read as tuning parameters in sate variable explorer.<\/span><\/p>\n
    \n
  • Range: 0 to 1<\/span>\n
      \n
    • 0: Disable<\/span><\/li>\n
    • 1: Enable<\/span><\/li>\n<\/ul>\n<\/li>\n
    • Default: 0<\/span><\/li>\n
    • Data Type: uint8_t<\/span><\/li>\n<\/ul>\n<\/td>\n
\"A<\/span><\/td>\n<\/tr>\n
Accelerator Configuration<\/strong><\/span><\/td>\nSelect which among the available FIR hardware accelerator to use for the FIR processing.<\/span><\/p>\n
    \n
  • 0: Accelerator 1 (Default)<\/span><\/li>\n
  • 1: Accelerator 2<\/span><\/li>\n
  • 2: Both Accelerators<\/span><\/li>\n<\/ul>\n

    Range: 0 to 2<\/span><\/p>\n

    Default: 0<\/span><\/p>\n

    Data Type: uint8_t<\/span><\/p>\n

    On ADSP-21593, when this configuration is set to Accelerator 1, only the first accelerator will be used, when set to Accelerator 2, only the second accelerator will be used, and when set to Both Accelerators, both available FIR accelerators will be used with almost equal number of filters processed by both accelerators.<\/span><\/p>\n

    When both hardware accelerators are used:<\/span><\/p>\n

      \n
    • The average and maxixmum mcps of both the accelerators shall be individually readable from the SV explorer by enabling the “enable cycles measurement” additional configuration,\u00a0<\/span><\/li>\n
    • Additional memory records corresponding to the second accelerators input, output and filter coefficient buffers will be created with their labels containing the prefix “(Acc 2)”. This is detailed in the section “Memory Allocation Considerations for SHARC ADSP-21593 Platform in Dual Accelerator Mode”.<\/span><\/li>\n<\/ul>\n

      On DSPs with only a single accelerator such as the ADSP-21569 (GUL), selection of accelerator configuration will be available, however, all filtering jobs will be processed by the only available FIR accelerator.<\/span><\/p>\n

      \u00a0<\/span><\/td>\n

\n

\"\"<\/span><\/p>\n

\"\"<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Tuning Parameters<\/span><\/strong><\/p>\n

For each filter combination in FIRA MIMO, this object exposes these two tuning parameters to the GT.<\/span><\/p>\n\n\n\n\n\n
Mode<\/strong><\/td>\nDescription<\/strong><\/td>\n<\/tr>\n
Mode<\/strong><\/span><\/td>\nThe mode of each filter can be set to:<\/span><\/p>\n
    \n
  • Normal<\/span><\/li>\n
  • Bypass<\/span><\/li>\n
  • Off<\/span><\/li>\n<\/ul>\n

    This parameter is of the category \u201cState\u201d and therefore, the configurations done for Filter modes will be transferred to the device only after the device is connected.<\/span><\/td>\n<\/tr>\n

Coefficients<\/strong><\/span><\/td>\nFilter coefficients can be imported from .csv files. The filter taps set in the GTT must match the taps of the filter being imported from the .csv file.<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Control Parameters<\/span><\/strong><\/p>\n

There are no control parameters available for FIRA MIMO.<\/p>\n

Memory Allocation Considerations for SHARC ADSP-21593 Platform in Dual Accelerator Mode<\/span><\/strong><\/p>\n

When using the FIRAMIMO object on a SHARC ADSP-21593 in dual accelerator mode, careful memory record placement consideration is required to maximize the number of FIR filters that can be processed. The hardware FIR accelerators in the DSP perform operations in parallel with the cores, causing memory access bottleneck due to the increase in the number of parallel memory accesses to the external memory (DDR3). This can be attributed to the page management overheads incurred by the Dynamic Memory Controller (DMC) as described in the EE-412 document<\/a><\/span>, which adversely impacts the FIR accelerator performance, limiting the total number of FIR filters that can be processed by the AO. In order to mitigate the issue and improve the processing capacity of the accelerators, it is recommended that the input, output and filter coefficient buffers accessed by each accelerator are placed in dedicated DDR3 memory banks.<\/span><\/p>\n

To enable placement of the buffers in separate banks, when the “Accelerator Configuration” additional configuration parameter is set to 2 (Both Accelerators), a new set of additional memory records with the prefix “(Acc 2)” are created to accommodate the second FIR accelerator’s input, output and coefficient buffers. The following figure shows the Memory Latency window in GTT highlighting the newly created memory records:<\/span><\/p>\n

\"\"<\/p>\n

In this configuration, following are the memory records accessed by the accelerators:<\/span><\/p>\n\n\n\n\n\n\n\n\n\n\n
<\/td>\nHardware FIR Accelerator 1<\/strong><\/td>\nHardware FIR Accelerator 2<\/strong><\/td>\nDescription<\/strong><\/td>\n<\/tr>\n
1<\/strong><\/td>\nInput Memory<\/td>\n(Acc 2) Input Memory<\/td>\nHigh rate input buffers<\/td>\n<\/tr>\n
2<\/strong><\/td>\nLowrate Input Memory<\/td>\n(Acc 2) Lowrate Input Memory<\/td>\nLow rate input buffers<\/td>\n<\/tr>\n
3<\/strong><\/td>\nParameter Memory<\/td>\n(Acc 2) Parameter Memory<\/td>\nFilter coefficient buffers<\/td>\n<\/tr>\n
4<\/strong><\/td>\nDownsampling Intermediate Memory<\/td>\n(Acc 2) Downsampling Intermediate Memory<\/td>\nDownsampling filter output buffers<\/td>\n<\/tr>\n
5<\/strong><\/td>\nUpsampling 1 Input Memory<\/td>\n(Acc 2) Upsampling 1 Input Memory<\/td>\nStage 1 upsampling filter input buffers<\/td>\n<\/tr>\n
6<\/strong><\/td>\nUpsampling 2 Input Memory<\/td>\n(Acc 2) Upsampling 2 Input Memory<\/td>\nStage 2 upsampling filter input buffers<\/td>\n<\/tr>\n
7<\/strong><\/td>\nIntermediate Temp Memory<\/td>\n(Acc 2) Intermediate Temp Memory<\/td>\nTemporary memory for coefficient format conversion<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

As per the recommendation, notice in the above figure that the memory records accessed by accelerator 1 are all placed in Level 7 memory latency, and the memory records accessed by accelerator 2 are all placed in Level 8 memory latency. It is expected that the platform maps these memory latency levels to un-cached memory regions that are in separate DDR3 memory banks in order to fully realize the separation of buffers.<\/span><\/p>\n

At 512 sample block length, with 2k-tap high rate filters, following are the improvements observed in the total number of filters that can be processed by the FIRAMIMO AO in single vs dual accelerator modes:<\/span><\/p>\n

    \n
  • All accelerator buffers placed in Level 5 latency: 20% (32 filters to 40 filters).<\/span><\/li>\n
  • Accelerator 1 buffers in Level 7 and accelerator 2 buffers in Level 8, mapped to separate DD3 banks: ~90% (32 filters to 60 filters).<\/span><\/li>\n<\/ul>\n

    It is important to note that the separation of the memory records for the hardware FIR accelerators, however, increases the core MIPS consumption by about 30-60% in both single and dual accelerator modes due to additional buffer movement and summation operations done by the core to reduce the memory access overheads.<\/span><\/p>\n

     <\/p>\n

    Note:<\/p>\n

    FIRAMIMO gives clear output in GUL, IVP but is distorted on HDP+ platform when ‘Input memory’ and ‘Upsampling1 input memory’ records are kept in Level4 or Level5, due to cache flush issue on HDP+ platform. The workaround is to keep these two memory records in Level1 to Level3.<\/p>\n

    \"\"<\/p>\n

     <\/p>\n","protected":false},"excerpt":{"rendered":"

    FIRA MIMO audio object is a group of FIR filter banks associated with each input and output. FIRA stands for \u201cfir accelerator\u201d and it indicates that the underlying implementation uses a hardware accelerator. MIMO stands for \u201cmulti-input multi output\u201d indicating that each output is the summation of one or more FIR filtered inputs. FIRA MIMO […]<\/p>\n","protected":false},"author":107,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"ocean_post_layout":"","ocean_both_sidebars_style":"","ocean_both_sidebars_content_width":0,"ocean_both_sidebars_sidebars_width":0,"ocean_sidebar":"0","ocean_second_sidebar":"0","ocean_disable_margins":"enable","ocean_add_body_class":"","ocean_shortcode_before_top_bar":"","ocean_shortcode_after_top_bar":"","ocean_shortcode_before_header":"","ocean_shortcode_after_header":"","ocean_has_shortcode":"","ocean_shortcode_after_title":"","ocean_shortcode_before_footer_widgets":"","ocean_shortcode_after_footer_widgets":"","ocean_shortcode_before_footer_bottom":"","ocean_shortcode_after_footer_bottom":"","ocean_display_top_bar":"default","ocean_display_header":"default","ocean_header_style":"","ocean_center_header_left_menu":"0","ocean_custom_header_template":"0","ocean_custom_logo":0,"ocean_custom_retina_logo":0,"ocean_custom_logo_max_width":0,"ocean_custom_logo_tablet_max_width":0,"ocean_custom_logo_mobile_max_width":0,"ocean_custom_logo_max_height":0,"ocean_custom_logo_tablet_max_height":0,"ocean_custom_logo_mobile_max_height":0,"ocean_header_custom_menu":"0","ocean_menu_typo_font_family":"0","ocean_menu_typo_font_subset":"","ocean_menu_typo_font_size":0,"ocean_menu_typo_font_size_tablet":0,"ocean_menu_typo_font_size_mobile":0,"ocean_menu_typo_font_size_unit":"px","ocean_menu_typo_font_weight":"","ocean_menu_typo_font_weight_tablet":"","ocean_menu_typo_font_weight_mobile":"","ocean_menu_typo_transform":"","ocean_menu_typo_transform_tablet":"","ocean_menu_typo_transform_mobile":"","ocean_menu_typo_line_height":0,"ocean_menu_typo_line_height_tablet":0,"ocean_menu_typo_line_height_mobile":0,"ocean_menu_typo_line_height_unit":"","ocean_menu_typo_spacing":0,"ocean_menu_typo_spacing_tablet":0,"ocean_menu_typo_spacing_mobile":0,"ocean_menu_typo_spacing_unit":"","ocean_menu_link_color":"","ocean_menu_link_color_hover":"","ocean_menu_link_color_active":"","ocean_menu_link_background":"","ocean_menu_link_hover_background":"","ocean_menu_link_active_background":"","ocean_menu_social_links_bg":"","ocean_menu_social_hover_links_bg":"","ocean_menu_social_links_color":"","ocean_menu_social_hover_links_color":"","ocean_disable_title":"default","ocean_disable_heading":"default","ocean_post_title":"","ocean_post_subheading":"","ocean_post_title_style":"","ocean_post_title_background_color":"","ocean_post_title_background":0,"ocean_post_title_bg_image_position":"","ocean_post_title_bg_image_attachment":"","ocean_post_title_bg_image_repeat":"","ocean_post_title_bg_image_size":"","ocean_post_title_height":0,"ocean_post_title_bg_overlay":0.5,"ocean_post_title_bg_overlay_color":"","ocean_disable_breadcrumbs":"default","ocean_breadcrumbs_color":"","ocean_breadcrumbs_separator_color":"","ocean_breadcrumbs_links_color":"","ocean_breadcrumbs_links_hover_color":"","ocean_display_footer_widgets":"default","ocean_display_footer_bottom":"default","ocean_custom_footer_template":"0","footnotes":"","ocean_post_oembed":"","ocean_post_self_hosted_media":"","ocean_post_video_embed":"","ocean_link_format":"","ocean_link_format_target":"self","ocean_quote_format":"","ocean_quote_format_link":"post","ocean_gallery_link_images":"on","ocean_gallery_id":[]},"categories":[315],"tags":[],"coauthors":[292],"_links":{"self":[{"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=\/wp\/v2\/posts\/25178"}],"collection":[{"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=\/wp\/v2\/users\/107"}],"replies":[{"embeddable":true,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=25178"}],"version-history":[{"count":18,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=\/wp\/v2\/posts\/25178\/revisions"}],"predecessor-version":[{"id":29755,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=\/wp\/v2\/posts\/25178\/revisions\/29755"}],"wp:attachment":[{"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=25178"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=25178"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=25178"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/audioworx.transfunnel.co\/old\/index.php?rest_route=%2Fwp%2Fv2%2Fcoauthors&post=25178"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}